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2014-03-24 rev.3.0 74VHC123AFT,74vhc221aft 1 cmos digital integrated circuits silicon monolithic 74VHC123AFT,74vhc221aft 74VHC123AFT,74vhc221aft 74VHC123AFT,74vhc221aft 74VHC123AFT,74vhc221aft start of commercial production 2013-05 1. 1. 1. 1. functional description functional description functional description functional description ? dual monostable multivibrator 74VHC123AFT: retriggerable 74vhc221aft: non-retriggerable 2. 2. 2. 2. general general general general the 74vhc123a/221aft are high speed cmos monostable multivibrator fabricated with silicon gate c 2 mos technology. there are two trigger inputs, a input (negative edge), and b input (positive edge). these inputs are valid for a slow rise/fall time signal (t r = t f = 1 s) as they are schmitt trigger inputs. this device may also be triggered by using clr input (positive edge). after triggering, the output stays in a monostable state for a time period determined by the external resistor and capacitor (r x , c x ). a low level at the clr input breaks this state. limits for c x and r x are: external capacitor, c x : no limit external resistor, r x : v cc = 2.0 v more than 5 k ? v cc 3.0 v more than 1 k ? an input protection circuit ensures that 0 to 5.5 v can be applied to the input pins without regard to the supply voltage. this device can be used to interface 5 v to 3 v systems and two supply systems such as battery back up. this circuit prevents device destruction due to mismatched supply and input voltages. 3. 3. 3. 3. features (note) features (note) features (note) features (note) (1) high speed: propagation delay time = 8.1 ns (typ.) at v cc = 5 v (2) low power dissipation: standby state: 4 a (max) at t a = 25 active state: 750 a (max) at t a = 25 (3) high noise immunity: v nih = v nil = 28 % v cc (min) (4) power-down protection is provided on all inputs. (5) balanced propagation delays: t plh t phl (6) wide operating voltage range: v cc(opr) = 2 v to 5.5 v (7) pin and function compatible with 74hc123,74hc221 type. note: in the case of using only one circuit, clr should be tied to gnd, r x /c x c x q should be tied to open, the other inputs should be tied to v cc or gnd.
2014-03-24 rev.3.0 74VHC123AFT,74vhc221aft 2 4. 4. 4. 4. packaging packaging packaging packaging 5. 5. 5. 5. pin assignment pin assignment pin assignment pin assignment 6. 6. 6. 6. marking marking marking marking 74VHC123AFT 74vhc221aft tssop16b
2014-03-24 rev.3.0 74VHC123AFT,74vhc221aft 3 7. 7. 7. 7. iec logic symbol iec logic symbol iec logic symbol iec logic symbol 74VHC123AFT 74vhc221aft 8. 8. 8. 8. truth table truth table truth table truth table x: don't care
2014-03-24 rev.3.0 74VHC123AFT,74vhc221aft 4 9. 9. 9. 9. block diagram block diagram block diagram block diagram (1) c x , r x , d x are external capacitor, resistor, and diode, respectively. (2) external clamping diode, d x ; the external capacitor is charged to v cc level in the wait state, i.e. when no trigger is applied. if the supply voltage is turned off, c x is discharges mainly through the internal (parasitic) diode. if c x is sufficiently large and v cc drops rapidly, there will be some possibility of damaging the ic through in rush current or latch-up. if the capacitance of the supply voltage filter is large enough and v cc drops slowly, the in rush current is automatically limited and damage to the ic is avoided. the maximum value of forward current through the parasitic diode is 20 ma. in the case of a large c x , the limit of fall time of the supply voltage is determined as follows: t f (v cc - 0.7) c x /20 ma (t f is the time between the supply voltage turn off and the supply voltage reaching 0.4 v cc .) in the even a system does not satisfy the above condition, an external clamping diode (d x ) is needed to protect the ic from rush current.
2014-03-24 rev.3.0 74VHC123AFT,74vhc221aft 5 10. 10. 10. 10. system diagram system diagram system diagram system diagram fig. fig. fig. fig. 10.1 10.1 10.1 10.1 74VHC123AFT 74VHC123AFT 74VHC123AFT 74VHC123AFT fig. fig. fig. fig. 10.2 10.2 10.2 10.2 74vhc221aft 74vhc221aft 74vhc221aft 74vhc221aft
2014-03-24 rev.3.0 74VHC123AFT,74vhc221aft 6 11. 11. 11. 11. timing chart timing chart timing chart timing chart fig. fig. fig. fig. 11.1 11.1 11.1 11.1 74VHC123AFT 74VHC123AFT 74VHC123AFT 74VHC123AFT fig. fig. fig. fig. 11.2 11.2 11.2 11.2 74vhc221aft 74vhc221aft 74vhc221aft 74vhc221aft
2014-03-24 rev.3.0 74VHC123AFT,74vhc221aft 7 12. 12. 12. 12. functional description functional description functional description functional description (1) standby state the external capacitor (c x ) is fully charged to v cc in the stand-by state. that means, before triggering, the q p and q n transistors which are connected to the r x /c x node are in the off state. two comparators that relate to the timing of the output pulse, and two reference voltage supplies turn off. the total supply current is only leakage current. (2) trigger operation trigger operation is effective in any of the following three cases. first, the condition where the a input is low, and the b input has a rising signal; second, where the b input is high, and the a input has a falling signal; and third, where the a input is low and the b input is high, and the clr input has a rising signal. after a trigger becomes effective, comparators c 1 and c 2 start operating, and q n is turned on. the external capacitor discharges through q n . the voltage level at the r x /c x node drops. if the r x /c x voltage level falls to the internal reference voltage v ref l, the output of c 1 becomes low. the flip-flop is then reset and q n turns off. at that moment c 1 stops but c 2 continues operating. after q n turns off, the voltage at the r x /c x node starts rising at a rate determined by the time constant of external capacitor c x and resistor r x . upon triggering, output q becomes high, following some delay time of the internal f/f and gates. it stays high even if the voltage of r x /c x changes from falling to rising. when r x /c x reaches the internal reference voltage v ref h, the output of c 2 becomes low, the output q goes low and c 2 stops its operation. that means, after triggering, when the voltage level of the r x /c x node reaches v ref h, the ic returns to its monostable state. with large values of c x and r x , and ignoring the discharge time of the capacitor and internal delays of the ic, the width of the output pulse, t wout , is as follows: t wout = 1.0 c x r x (3) retrigger operation when a new trigger is applied to either input a or b while in the monostable state, it is effective only if the ic is charging c x . the voltage level of the r x /c x node then falls to v ref l level again. therefore the q output stays high if the next trigger comes in before the time period set by c x and r x . if the new trigger is very close to previous trigger, such as an occurrence during the discharge cycle, it will have no effect. the minimum time for a trigger to be effective 2 nd trigger, t rr (min), depends on v cc and c x .(74VHC123AFT) (4) reset operation in normal operation, the clr input is held high. if clr is low, a trigger has no effect because the q output is held low and the trigger control f/f is reset. also, q p turns on and c x is charged rapidly to v cc . this means if clr is set low, the ic goes into a wait state.
2014-03-24 rev.3.0 74VHC123AFT,74vhc221aft 8 13. 13. 13. 13. absolute maximum ratings (note) absolute maximum ratings (note) absolute maximum ratings (note) absolute maximum ratings (note) characteristics supply voltage input voltage output voltage input diode current output diode current output current v cc /ground current power dissipation storage temperature symbol v cc v in v out i ik i ok i out i cc p d t stg rating -0.5 to 7.0 -0.5 to 7.0 -0.5 to v cc + 0.5 -20 20 25 50 180 -65 to 150 unit v v v ma ma ma ma mw note: exceeding any of the absolute maximum ratings, even briefly, lead to deterioration in ic performance or even destruction. using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum ratings and the operating ranges. please design the appropriate reliability upon reviewing the toshiba semiconductor reliability handbook ( handling precautions / derating concept and methods ) and individual reliability data (i.e. reliability test report and estimated failure rate, etc). 14. 14. 14. 14. operating ranges (note) operating ranges (note) operating ranges (note) operating ranges (note) characteristics supply voltage input voltage output voltage operating temperature input rise and fall times external capacitor external resistor symbol v cc v in v out t opr dt/dv c x r x note (note 1) (note 1) test condition v cc = 3.3 0.3 v v cc = 5 0.5 v v cc = 2.0 v v cc 3.0 v rating 2.0 to 5.5 0 to 5.5 0 to v cc -40 to 85 0 to 100 0 to 20 no limitation 5 k 1 k unit v v v ns/v f ? note: the operating ranges must be maintained to ensure the normal operation of the device. unused inputs and bus inputs must be tied to either v cc or gnd. note 1: the maximum allowable values of c x and r x are a function of leakage of capacitor c x , the leakage of 74vhc123a/221aft, and leakage due to board layout and surface resistance. susceptibility to externally induced noise signals may occur for r x > 1 m ? .
2014-03-24 rev.3.0 74VHC123AFT,74vhc221aft 9 15. 15. 15. 15. electrical characteristics electrical characteristics electrical characteristics electrical characteristics 15.1. 15.1. 15.1. 15.1. dc characteristics (unless otherwise specified, t dc characteristics (unless otherwise specified, t dc characteristics (unless otherwise specified, t dc characteristics (unless otherwise specified, t a a a a = 25 = 25 = 25 = 25 ) ) ) ) characteristics high-level input voltage low-level input voltage high-level output voltage low-level output voltage input leakage current r x /c x terminal off-state current quiescent supply current active-state supply current (per circuit) symbol v ih v il v oh v ol i in i in i cc i cc(opr) test condition v in = v ih or v il v in = v ih or v il v in = 5.5 v or gnd v in = v cc or gnd v in = v cc or gnd v in = v cc or gnd r x /c x = 0.5 v cc i oh = -50 a i oh = -4 ma i oh = -8 ma i ol = 50 a i ol = 4 ma i ol = 8 ma v cc (v) 2.0 3.0 to 5.5 2.0 3.0 to 5.5 2.0 3.0 4.5 3.0 4.5 2.0 3.0 4.5 3.0 4.5 0 to 5.5 5.5 5.5 3.0 4.5 5.5 min 1.50 v cc 0.7 1.9 2.9 4.4 2.58 3.94 typ. 2.0 3.0 4.5 0.0 0.0 0.0 160 380 560 max 0.50 v cc 0.3 0.1 0.1 0.1 0.36 0.36 0.1 0.25 4.0 250 500 750 unit v v v v a a a a 15.2. 15.2. 15.2. 15.2. dc characteristics (unless otherwise specified, t dc characteristics (unless otherwise specified, t dc characteristics (unless otherwise specified, t dc characteristics (unless otherwise specified, t a a a a = -40 to 85 = -40 to 85 = -40 to 85 = -40 to 85 ) ) ) ) characteristics high-level input voltage low-level input voltage high-level output voltage low-level output voltage input leakage current r x /c x terminal off-state current quiescent supply current active-state supply current (per circuit) symbol v ih v il v oh v ol i in i in i cc i cc(opr) test condition v in = v ih or v il v in = v ih or v il v in = 5.5 v or gnd v in = v cc or gnd v in = v cc or gnd v in = v cc or gnd r x /c x = 0.5 v cc i oh = -50 a i oh = -4 ma i oh = -8 ma i ol = 50 a i ol = 4 ma i ol = 8 ma v cc (v) 2.0 3.0 to 5.5 2.0 3.0 to 5.5 2.0 3.0 4.5 3.0 4.5 2.0 3.0 4.5 3.0 4.5 0 to 5.5 5.5 5.5 3.0 4.5 5.5 min 1.50 v cc 0.7 1.9 2.9 4.4 2.48 3.80 max 0.50 v cc 0.3 0.1 0.1 0.1 0.44 0.44 1.0 2.5 40.0 280 650 975 unit v v v v a a a a
2014-03-24 rev.3.0 74VHC123AFT,74vhc221aft 10 15.3. 15.3. 15.3. 15.3. timing requirements (unless otherwise specified, t timing requirements (unless otherwise specified, t timing requirements (unless otherwise specified, t timing requirements (unless otherwise specified, t a a a a = 25 = 25 = 25 = 25 , input: t , input: t , input: t , input: t r r r r = t = t = t = t f f f f = 3 ns) = 3 ns) = 3 ns) = 3 ns) characteristics minimum pulse width minimum pulse width ( clr ) minimum retrigger time part number 74VHC123AFT symbol t w(l) ,t w(h) t w(l) t rr test condition r x = 1 k ? , c x = 100 pf r x = 1 k ? , c x = 0.01 f v cc (v) 3.3 0.3 5.0 0.5 3.3 0.3 5.0 0.5 3.3 0.3 5.0 0.5 3.3 0.3 5.0 0.5 typ. 60 39 1.5 1.2 limit 5.0 5.0 5.0 5.0 unit ns ns ns s 15.4. 15.4. 15.4. 15.4. timing requirements timing requirements timing requirements timing requirements (unless otherwise specified, t (unless otherwise specified, t (unless otherwise specified, t (unless otherwise specified, t a a a a = -40 to 85 = -40 to 85 = -40 to 85 = -40 to 85 , input: t , input: t , input: t , input: t r r r r = t = t = t = t f f f f = 3 ns) = 3 ns) = 3 ns) = 3 ns) characteristics minimum pulse width minimum pulse width ( clr ) symbol t w(l) ,t w(h) t w(l) test condition v cc (v) 3.3 0.3 5.0 0.5 3.3 0.3 5.0 0.5 limit 5.0 5.0 5.0 5.0 unit ns ns 15.5. 15.5. 15.5. 15.5. ac characteristics (unless otherwise specified, t ac characteristics (unless otherwise specified, t ac characteristics (unless otherwise specified, t ac characteristics (unless otherwise specified, t a a a a = 25 = 25 = 25 = 25 , input: t , input: t , input: t , input: t r r r r = t = t = t = t f f f f = 3 ns) = 3 ns) = 3 ns) = 3 ns) characteristics propagation delay time (a, b-q, q ) propagation delay time ( clr trigger-q, q ) propagation delay time ( clr -q, q ) output pulse width output pulse width error between circuits (in same package) input capacitance power dissipation capacitance symbol t plh ,t phl t plh ,t phl t plh ,t phl t wout ? t wout c in c pd note (note 1) test condition c x = 28 pf, r x = 2 k ? c x = 0.01 f, r x = 10 k ? c x = 0.1 f, r x = 10 k ? v cc (v) 3.3 0.3 5.0 0.5 3.3 0.3 5.0 0.5 3.3 0.3 5.0 0.5 3.3 0.3 5.0 0.5 3.3 0.3 5.0 0.5 3.3 0.3 5.0 0.5 c l (pf) 15 50 15 50 15 50 15 50 15 50 15 50 50 50 50 min 90 90 0.9 0.9 typ. 13.4 15.9 8.1 9.6 14.5 17.0 8.7 10.2 10.3 12.8 6.3 7.8 160 133 100 100 1.0 1.0 1 4 73 max 20.6 24.1 12.0 14.0 22.4 25.9 12.9 14.9 15.8 19.3 9.4 11.4 240 200 110 110 1.1 1.1 10 unit ns ns ns ns s ms % pf note 1: c pd is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load. average operating current can be obtained by the equation. i cc(opr) = c pd v cc f in + i cc' duty/100 + i cc /2 (per circuit), (i cc : active supply current), (duty: %)
2014-03-24 rev.3.0 74VHC123AFT,74vhc221aft 11 15.6. 15.6. 15.6. 15.6. ac characteristics ac characteristics ac characteristics ac characteristics (unless otherwise specified, t (unless otherwise specified, t (unless otherwise specified, t (unless otherwise specified, t a a a a = -40 to 85 = -40 to 85 = -40 to 85 = -40 to 85 , input: t , input: t , input: t , input: t r r r r = t = t = t = t f f f f = 3 ns) = 3 ns) = 3 ns) = 3 ns) characteristics propagation delay time (a, b-q, q ) propagation delay time ( clr trigger-q, q ) propagation delay time ( clr -q, q ) output pulse width input capacitance symbol t plh ,t phl t plh ,t phl t plh ,t phl t wout c in test condition c x = 28 pf, r x = 2 k ? c x = 0.01 f, r x = 10 k ? c x = 0.1 f, r x = 10 k ? v cc (v) 3.3 0.3 5.0 0.5 3.3 0.3 5.0 0.5 3.3 0.3 5.0 0.5 3.3 0.3 5.0 0.5 3.3 0.3 5.0 0.5 3.3 0.3 5.0 0.5 c l (pf) 15 50 15 50 15 50 15 50 15 50 15 50 50 50 50 min 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 90 90 0.9 0.9 max 24.0 27.5 14.0 16.0 26.0 29.5 15.0 17.0 18.5 22.0 11.0 13.0 300 240 110 110 1.1 1.1 10 unit ns ns ns ns s ms pf
2014-03-24 rev.3.0 74VHC123AFT,74vhc221aft 12 16. 16. 16. 16. characteristics curves (note) characteristics curves (note) characteristics curves (note) characteristics curves (note) fig. fig. fig. fig. 16.1 16.1 16.1 16.1 t t t t wout wout wout wout - c - c - c - c x x x x (typ.) (typ.) (typ.) (typ.) fig. fig. fig. fig. 16.2 16.2 16.2 16.2 t t t t rr rr rr rr - v - v - v - v cc cc cc cc (typ.) (typ.) (typ.) (typ.) (74VHC123AFT) (74VHC123AFT) (74VHC123AFT) (74VHC123AFT) fig. fig. fig. fig. 16.3 16.3 16.3 16.3 output pulse width constant k - supply output pulse width constant k - supply output pulse width constant k - supply output pulse width constant k - supply voltage (typ.) voltage (typ.) voltage (typ.) voltage (typ.) note: the above characteristics curves are presented for reference only and not guaranteed by production test, unless otherwise noted.
2014-03-24 rev.3.0 74VHC123AFT,74vhc221aft 13 17. 17. 17. 17. internal equivalent circuit internal equivalent circuit internal equivalent circuit internal equivalent circuit package dimensions package dimensions package dimensions package dimensions unit: mm weight: 0.055 g (typ.) package name(s) nickname: tssop16b
2014-03-24 rev.3.0 74VHC123AFT,74vhc221aft 14 restrictions on product use restrictions on product use restrictions on product use restrictions on product use ? toshiba corporation, and its subsidiaries and affiliates (collectively "toshiba"), reserve the right to make changes to the information in this document, and related hardware, software and systems (collectively "product") without notice. ? this document and any information herein may not be reproduced without prior written permission from toshiba. even with toshiba's written permission, reproduction is permissible only if reproduction is without alteration/omission. ? though toshiba works continually to improve product's quality and reliability, product can malfunction or fail. customers are responsible for complying with safety standards and for providing adequate designs and safeguards for their hardware, software and systems which minimize risk and avoid situations in which a malfunction or failure of product could cause loss of human life, bodily injury or damage to property, including data loss or corruption. before customers use the product, create designs including the product, or incorporate the product into their own applications, customers must also refer to and comply with (a) the latest versions of all relevant toshiba information, including without limitation, this document, the specifications, the data sheets and application notes for product and the precautions and conditions set forth in the "toshiba semiconductor reliability handbook" and (b) the instructions for the application with which the product will be used with or for. customers are solely responsible for all aspects of their own product design or applications, including but not limited to (a) determining the appropriateness of the use of this product in such design or applications; (b) evaluating and determining the applicability of any information contained in this document, or in charts, diagrams, programs, algorithms, sample application circuits, or any other referenced documents; and (c) validating all operating parameters for such designs and applications. toshiba assumes no liability for customers' product design or applications. toshiba assumes no liability for customers' product design or applications. toshiba assumes no liability for customers' product design or applications. toshiba assumes no liability for customers' product design or applications. ? product is neither intended nor warranted for use in equipments or systems that require product is neither intended nor warranted for use in equipments or systems that require product is neither intended nor warranted for use in equipments or systems that require product is neither intended nor warranted for use in equipments or systems that require extraordinarily high levels of quality and/or reliability, and/or a malfunction or failure of which may extraordinarily high levels of quality and/or reliability, and/or a malfunction or failure of which may extraordinarily high levels of quality and/or reliability, and/or a malfunction or failure of which may extraordinarily high levels of quality and/or reliability, and/or a malfunction or failure of which may cause loss of human life, bodily injury, serious property damage and/or serious public impact cause loss of human life, bodily injury, serious property damage and/or serious public impact cause loss of human life, bodily injury, serious property damage and/or serious public impact cause loss of human life, bodily injury, serious property damage and/or serious public impact ("unintended use"). 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